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Current-limiting challenges for all-spin logic devices
All-spin logic device (ASLD) has attracted increasing interests as one of the most promising post-CMOS device candidates, thanks to its low power, non-volatility and logic-in-memory structure. Here we investigate the key current-limiting factors and develop a physics-based model of ASLD through nano...
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| Publicado no: | Sci Rep |
|---|---|
| Main Authors: | , , , , , , |
| Formato: | Artigo |
| Idioma: | Inglês |
| Publicado em: |
Nature Publishing Group
2015
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| Assuntos: | |
| Acesso em linha: | https://ncbi.nlm.nih.gov/pmc/articles/PMC4598875/ https://ncbi.nlm.nih.gov/pubmed/26449410 https://ncbi.nlm.nih.govhttp://dx.doi.org/10.1038/srep14905 |
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