Hardware Genetic Algorithm Optimization by Critical Path Analysis using a Custom VLSI Architecture

This paper propose a Virtual-Field Programmable Gate Array (V-FPGA) architecture that allows direct access to its configuration bits to facilitate hardware evolution, thereby allowing any combinational or sequential digital circuit to be realized. By using the V-FPGA, this paper investigates two po...

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Päätekijät: Farouk Smith, Allan Edward van den Berg
Aineistotyyppi: Artigo
Kieli:Inglês
Julkaistu: South African Institute of Computer Scientists and Information Technologists 2015-07-01
Sarja:South African Computer Journal
Aiheet:
FPGA, Genetic Algorithm, Virtual Reconfigurable Circuit, Evolutionary Hardware, Logic Element, Digital Circuit, Cartesian Genetic Programming, Hardware Chromosome, Intrinsic Evolution, Off-Chip Evolution, On-Chip Evolution.
Linkit:http://sacj.cs.uct.ac.za/index.php/sacj/article/view/275
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