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An RF-SoC-Based Ultra-Wideband Chirp Synthesizer
This paper presents the design and development of a digital two-channel chirp synthesizer using a field-programmable gate array (FPGA) device. To achieve an integrated solution, the design was implemented on radio-frequency system-on-chip (RF-SoC) technology that includes digital-to-analog converter...
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| Main Authors: | , , , , , , |
|---|---|
| 格式: | Artigo |
| 語言: | Inglês |
| 出版: |
IEEE
2022-01-01
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| 叢編: | IEEE Access |
| 主題: | |
| 在線閱讀: | https://ieeexplore.ieee.org/document/9766135/ |
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