Učitavanje...
Design of high-speed and low-latency Viterbi decoder
In a Viterbi decoder, there are two known memory organization techniques for the storage of survivor sequences, namely register exchange method and traceback method. This paper presents a new survivor path storage scheme that enables short latency in area-efficient Viterbi decoder. This is achieved...
Spremljeno u:
| Glavni autor: | |
|---|---|
| Format: | Artigo |
| Jezik: | Chinês |
| Izdano: |
National Computer System Engineering Research Institute of China
2018-09-01
|
| Serija: | Dianzi Jishu Yingyong |
| Teme: | |
| Online pristup: | http://www.chinaaet.com/article/3000090140 |
| Oznake: |
Dodaj oznaku
Bez oznaka, Budi prvi tko označuje ovaj zapis!
|