Novel Full TMR Placement Techniques for High-Speed Radiation Tolerant Digital Integrated Circuits

This paper presents a novel physical implementation methodology for high-speed Triple Modular Redundant (TMR) digital integrated circuits for harsh radiation environment applications. An improved distributed approach is presented to constrain redundant branches of Triple Modular Redundant (TMR) digi...

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Bibliographic Details
Main Authors: Karel Appels, Jeffrey Prinzie
Format: Artigo
Language:Inglês
Published: MDPI AG 2020-11-01
Series:Electronics
Subjects:
triple modular redundancy
65 nm CMOS technology
single event effects
radiation hardening by design
digital integrated circuits
Online Access:https://www.mdpi.com/2079-9292/9/11/1936
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