VLSI design of symmetric two-dimensional finite impulse response filter architecture using approximate circuits and parallel Processing

This study presents an innovative filter architecture for a Two-Dimensional (2-D) FIR filter and illustrates its implementation in VLSI design through symmetric processing, parallelism, and approximate computing principles. When L is the block size, the architecture incorporates parallel processing...

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Главные авторы:	Venkata Krishna Odugu, Gade Harish Babu, Janardhana Rao B, C Venkata Narasimhulu
Формат:	Artigo
Язык:	Inglês
Опубликовано:	Elsevier 2025-06-01
Серии:	e-Prime: Advances in Electrical Engineering, Electronics and Energy
Предметы:	2-d fir filter architecture Symmetry Parallel processing Approximate multiplier And approximate compressor
Online-ссылка:	http://www.sciencedirect.com/science/article/pii/S2772671125001214
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