Trap Analysis of Normally-Off Ga₂O₃ MOSFET Enabled by Charge Trapping Layer: Photon Stimulated Characterization and TDDB
A charge trapping layer (CTL) technique is incorporated to achieve a normally-off Ga2O3 MOSFET. The gate dielectric was engineered using a stack composed of a blocking layer (16 nm <inline-formula> <tex-math notation="LaTeX">${\mathrm { HfO}}_{\mathrm { x}}$ </tex-math></inline-formula> / 2 nm Al2O3...
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| Asıl Yazarlar: | , , , , , , |
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| Materyal Türü: | Artigo |
| Dil: | Inglês |
| Baskı/Yayın Bilgisi: |
IEEE
2025-01-01
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| Seri Bilgileri: | IEEE Journal of the Electron Devices Society |
| Konular: | |
| Online Erişim: | https://ieeexplore.ieee.org/document/10877719/ |
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