Novel Ternary Adder and Multiplier Designs Without Using Decoders or Encoders

Multiple-Valued Logic systems present significant improvements in terms of energy consumption over binary logic systems. This paper proposes new ternary combinational digital circuits that reduce energy consumption in low-power nano-scale embedded systems and Internet of Thing (IoT) devices to save...

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Bibliografski detalji

Glavni autori:	Jihad Mohamed Aljaam, Ramzi A. Jaber, Somaya Ali Al-Maadeed
Format:	Artigo
Jezik:	Inglês
Izdano:	IEEE 2021-01-01
Serija:	IEEE Access
Teme:	Carbon nano-tube field effect transistors (CNTFET) Noise immunity curve (NIC) PVT variations ternary logic circuits unary operators
Online pristup:	https://ieeexplore.ieee.org/document/9400354/
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