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Minimal Aliasing Single-Error-Correction Codes for DRAM Reliability Improvement

We discuss the problem of finding a minimal aliasing code among a class of systematic single-error-correction codes that are suitable to be implemented within DRAM die, as opposed to external ECC used in memory controller outside of DRAM chip. We prove a sharp lower bound of aliasing probability and...

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Bibliografische gegevens
Hoofdauteurs: Sung-Il Pae, Vivek Kozhikkottu, Dinesh Somasekar, Wei Wu, Shankar Ganesh Ramasubramanian, Melin Dadual, Hyungmin Cho, Kon-Woo Kwon
Formaat: Artigo
Taal:Inglês
Gepubliceerd in: IEEE 2021-01-01
Reeks:IEEE Access
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Online toegang:https://ieeexplore.ieee.org/document/9355147/
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