A Low-Cost Multi-Objective Cache Prefetcher for Complex and Irregular Memory Access Patterns
Hardware prefetching in processors, as an effective solution to hide the cache miss latencies, needs to be redesigned according to emerging applications behavior. Conventional prefetchers try to predict predefined patterns but are unable to prefetch a mixture of even simple detectable patterns, e.g....
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| Autores principales: | , , |
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| Formato: | Artigo |
| Lenguaje: | Inglês |
| Publicado: |
IEEE
2026-01-01
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| Colección: | IEEE Access |
| Materias: | |
| Acceso en línea: | https://ieeexplore.ieee.org/document/11367637/ |
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