An Approximate Bufferless Network-on-Chip
Bufferless network-on-chip (NoC) designs have drawn research attention in massively parallel multicore systems via their significant benefits in power and area savings. However, it shows poor throughput and low bandwidth in current bufferless designs due to complex bufferless routing and arbitration...
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| Autores principales: | , , |
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| Formato: | Artigo |
| Lenguaje: | Inglês |
| Publicado: |
IEEE
2019-01-01
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| Colección: | IEEE Access |
| Materias: | |
| Acceso en línea: | https://ieeexplore.ieee.org/document/8850126/ |
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