Logic Synthesis Strategy Oriented to Low Power Optimization
The article presents a synthesis strategy focused on low power implementations of combinatorial circuits in an array-type FPGA structure. Logic functions are described by means of BDD. A new form of the SWitch activity BDD diagram (SWBDD) is proposed, which enables a function decomposition to minimi...
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| Autori principali: | , , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
MDPI AG
2021-09-01
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| Serie: | Applied Sciences |
| Soggetti: | |
| Accesso online: | https://www.mdpi.com/2076-3417/11/19/8797 |
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