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Cita APA (7th ed.)
Kalaiselvi, K., & Mangalam, H. (2015). Power efficient and high performance VLSI architecture for AES algorithm. SpringerOpen.
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Cita Chicago (17th ed.)
Kalaiselvi, K., i H. Mangalam. Power Efficient and High Performance VLSI Architecture for AES Algorithm. SpringerOpen, 2015.
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Cita MLA (9th ed.)
Kalaiselvi, K., i H. Mangalam. Power Efficient and High Performance VLSI Architecture for AES Algorithm. SpringerOpen, 2015.
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