Task-Level Data Model for Hardware Synthesis Based on Concurrent Collections
The ever-increasing design complexity of modern digital systems makes it necessary to develop electronic system-level (ESL) methodologies with automation and optimization in the higher abstraction level. How the concurrency is modeled in the application specification plays a significant role in ESL...
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| Autori principali: | , , , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
Wiley
2012-01-01
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| Serie: | Journal of Electrical and Computer Engineering |
| Accesso online: | http://dx.doi.org/10.1155/2012/691864 |
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