FPGA Implementation of Variable Step Power Inversion Array for BeiDou Receiver
Given the susceptibility of satellite signals to intentional or unintentional interference; it is imperative to incorporate hardware-based navigation anti-jamming algorithms. Currently, spatial domain filtering is widely applied. While numerous variable step size (VSS) algorithms were used to improv...
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| Hauptverfasser: | , , , , |
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| Format: | Artigo |
| Sprache: | Inglês |
| Veröffentlicht: |
IEEE
2023-01-01
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| Schriftenreihe: | IEEE Access |
| Schlagworte: | |
| Online-Zugang: | https://ieeexplore.ieee.org/document/10264085/ |
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