Analysis of UCIe 48/64-GT/s Electrical Links

The Universal Chiplet Interconnect Express (UCIe) standard, developed with significant contributions from the authors, has emerged as a key solution for chiplet-based architectures, offering enhanced scalability, efficiency, and performance. This article presents an analysis of UCIe electrical links...

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Bibliografske podrobnosti

Principais autores:	Zuoguo Wu, Jong-Ru Guo
Format:	Artigo
Jezik:	Inglês
Izdano:	IEEE 2025-01-01
Serija:	IEEE Open Journal of the Solid-State Circuits Society
Teme:	artificial intelligence (AI) chiplet-based architectures die-to-die (D2D) interconnects error management high-performance computing (HPC) machine learning (ML)
Online dostop:	https://ieeexplore.ieee.org/document/11150380/
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