Dynamic Partial Reconfiguration of Concurrent Control Systems Specified by Petri Nets and Implemented in Xilinx FPGA Devices

This paper proposes a novel design concept of concurrent control systems specified by interpreted Petri nets and implemented in Xilinx FPGA devices. The technique is oriented on further dynamic partial reconfiguration of the system. An adequate splitting algorithm of the system into the dynamic (rec...

Täydet tiedot

Bibliografiset tiedot

Päätekijä:	Remigiusz Wisniewski
Aineistotyyppi:	Artigo
Kieli:	Inglês
Julkaistu:	IEEE 2018-01-01
Sarja:	IEEE Access
Aiheet:	Dynamic partial reconfiguration FPGA concurrent controllers Petri nets decomposition
Linkit:	https://ieeexplore.ieee.org/document/8359408/
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