High-Level Synthesis-Based FPGA Hardware Architecture for PCA+SVM for Real-Time Processing on Edge Computing Platforms

In the IoT and smart systems era, the massive amount of data generated from various IoT and smart devices are often sent directly to the cloud infrastructure for processing, analyzing, and storing. While handling this big data, conventional cloud infrastructure encounters many challenges, e.g., scar...

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Главные авторы:	Mokhles A. Mohsin, Darshika G. Perera
Формат:	Artigo
Язык:	Inglês
Опубликовано:	IEEE 2025-01-01
Серии:	IEEE Access
Предметы:	FPGAs embedded hardware architectures edge computing high-level synthesis (HLS) PCA+SVM accelerator
Online-ссылка:	https://ieeexplore.ieee.org/document/11303655/
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