Design of Wishbone-SPI verification platform based on UVM
As the complexity of the chip increases, the time it takes to verify the chip in the design process continues to increase. Aiming at the poor reusability and low coverage of traditional verification platforms, this paper uses Universal Verification Methodology(UVM) to design the Wishbone-SPI verific...
Salvato in:
| Autori principali: | , , |
|---|---|
| Natura: | Artigo |
| Lingua: | Chinês |
| Pubblicazione: |
National Computer System Engineering Research Institute of China
2022-06-01
|
| Serie: | Dianzi Jishu Yingyong |
| Soggetti: | |
| Accesso online: | http://www.chinaaet.com/article/3000150249 |
| Tags: |
Nessun Tag, puoi essere il primo ad aggiungerne!!
|