A Flexible Hardware Accelerator for Booth Polynomial Multiplier
This article presents a parameterized/flexible hardware accelerator design tailored for the Booth polynomial multiplication method. The flexibility is achieved by allowing users to compute multiplication operations across various operand lengths, reaching up to <inline-formula><math xmlns="http://ww...
Saved in:
| Main Author: | |
|---|---|
| Format: | Artigo |
| Language: | Inglês |
| Published: |
MDPI AG
2024-04-01
|
| Series: | Applied Sciences |
| Subjects: | |
| Online Access: | https://www.mdpi.com/2076-3417/14/8/3323 |
| Tags: |
No Tags, Be the first to tag this record!
|