A High SNR Improvement CMOS Analog Accumulator with Charge Compensation Technique

In this paper, a 7.75 kHz line rate analog domain time delay integration (TDI) CMOS analog accumulator with 128-stage is proposed. An adaptive compensation for the charge loss due to parasitic effects is adopted. Based on the influence mechanism of parasitic effects, alternately charging the top and...

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Autors principals:	Zhongjie Guo, Chen Li, Ruiming Xu, Xinqi Cheng, Changxu Su, Longsheng Wu
Format:	Artigo
Idioma:	Inglês
Publicat:	MDPI AG 2022-09-01
Col·lecció:	Sensors
Matèries:	TDI CMOS analog accumulator compensation charge loss
Accés en línia:	https://www.mdpi.com/1424-8220/22/18/7050
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