Programmable All-in-One 4×8-/2×16-/1×32-Bits Dual Mode Logic Multiplier in 16 nm FinFET With Semi-Automatic Flow

In this paper, an improved multiplier architecture, utilizing dual mode logic (DML) targeting single-instruction-multiple-data (SIMD)-like systems is proposed. The design introduces improvements at both the architecture and logic gate levels, by capitalizing on their synergistic combination. At the...

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Detalles Bibliográficos

Principais autores:	Netanel Shavit, Inbal Stanger, Ramiro Taco, Alexander Fish, Itamar Levi
Formato:	Artigo
Idioma:	Inglês
Publicado:	IEEE 2023-01-01
Series:	IEEE Access
Assuntos:	Alternative logic family automation flow configurable multipliers design flow dual mode logic (DML) dynamic logic
Acceso en liña:	https://ieeexplore.ieee.org/document/10286837/
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