A Comprehensive Survey of Hardware Security in AI Accelerators: A Lifecycle-Aligned Taxonomy of Threats, Defenses, and Emerging Paradigms

The growth of machine learning (ML) and deep learning (DL) has resulted in the rapid development and implementation of dedicated hardware accelerators, including GPUs, TPUs, FPGAs, and custom ASICs. These accelerators maximize performance and efficiency yet present novel hardware level security vuln...

Täydet tiedot

Bibliografiset tiedot

Päätekijät:	Karthi Balasubramanian, Sree Ranjani Rajendran
Aineistotyyppi:	Artigo
Kieli:	Inglês
Julkaistu:	IEEE 2026-01-01
Sarja:	IEEE Access
Aiheet:	Hardware security AI accelerators GPUs FPGAs ASICs edge AI
Linkit:	https://ieeexplore.ieee.org/document/11556079/
Tagit:	Lisää tagi Ei tageja, Lisää ensimmäinen tagi!