An FPGA-Based High-Performance Stateful Packet Processing Method
Compared to a stateless data plane, a stateful data plane offloads part of state information and control logic from a controller to a data plane to reduce communication overhead and improve packet processing efficiency. However, existing methods for implementing stateful data planes face challenges,...
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| Autori principali: | , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
MDPI AG
2023-11-01
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| Serie: | Micromachines |
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| Accesso online: | https://www.mdpi.com/2072-666X/14/11/2074 |
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