Higher-Order Time Sharing Masking
At CHES 2024, Time Sharing Masking (TSM) was introduced as a novel low-latency masking technique for hardware circuits. TSM offers area and randomness efficiency, as well as glitch-extended PINI security, but it is limited to first-order security. We address this limitation and generalize TSM to hi...
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| Autori principali: | , , , , |
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| Natura: | Artigo |
| Lingua: | Inglês |
| Pubblicazione: |
Ruhr-Universität Bochum
2025-03-01
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| Serie: | Transactions on Cryptographic Hardware and Embedded Systems |
| Soggetti: | |
| Accesso online: | https://tches.iacr.org/index.php/TCHES/article/view/12047 |
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