Synthesis of parallel adders from if-decision diagrams
Addition is one of the timing critical operations in most of modern processing units. For decades, extensive research has been done devoted to designing higher speed and less complex adder architectures, and to developing advanced adder implementation technologies. Decision diagrams are a promising...
Tallennettuna:
| Päätekijä: | |
|---|---|
| Aineistotyyppi: | Artigo |
| Kieli: | Inglês |
| Julkaistu: |
Belarusian National Technical University
2020-08-01
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| Sarja: | Системный анализ и прикладная информатика |
| Aiheet: | |
| Linkit: | https://sapi.bntu.by/jour/article/view/473 |
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