Selectively Fortifying Reconfigurable Computing Device to Achieve Higher Error Resilience
With the advent of 10 nm CMOS devices and “exotic” nanodevices, the location and occurrence time of hardware defects and design faults become increasingly unpredictable, therefore posing severe challenges to existing techniques for error-resilient computing because most of them statically assign har...
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| Auteurs principaux: | , , |
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| Format: | Artigo |
| Langue: | Inglês |
| Publié: |
Wiley
2012-01-01
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| Collection: | Journal of Electrical and Computer Engineering |
| Accès en ligne: | http://dx.doi.org/10.1155/2012/593532 |
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