An ASIP for Neural Network Inference on Embedded Devices with 99% PE Utilization and 100% Memory Hidden under Low Silicon Cost

The computation efficiency and flexibility of the accelerator hinder deep neural network (DNN) implementation in embedded applications. Although there are many publications on deep neural network (DNN) processors, there is still much room for deep optimization to further improve results. Multiple di...

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Bibliographic Details

Main Authors:	Muxuan Gao, He Chen, Dake Liu
Format:	Artigo
Language:	Inglês
Published:	MDPI AG 2022-05-01
Series:	Sensors
Subjects:	deep neural networks machine learning deep learning processor scheduling framework instruction set architecture (ISA)
Online Access:	https://www.mdpi.com/1424-8220/22/10/3841
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