Integrated Design Validation: Combining Simulation and Formal Verification for Digital Integrated Circuits
The correct design of complex hardware continues to challenge engineers. Bugs in a design that are not uncovered in early design stages can be extremely expensive. Simulation is a predominantly used tool to validate a design in industry. Formal verification overcomes the weakness of exhaustive simul...
Sábháilte in:
| Príomhchruthaitheoirí: | , , |
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| Formáid: | Artigo |
| Teanga: | Inglês |
| Foilsithe / Cruthaithe: |
International Institute of Informatics and Cybernetics
2006-04-01
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| Sraith: | Journal of Systemics, Cybernetics and Informatics |
| Ábhair: | |
| Rochtain ar líne: | http://www.iiisci.org/Journal/CV$/sci/pdfs/P457798.pdf
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| Clibeanna: |
Níl clibeanna ann, Bí ar an gcéad duine le clib a chur leis an taifead seo!
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