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Ripple Attenuation and Aliasing Suppression in Multisampling Digitally Controlled Inverters

The application of multisampling technology in voltage-source inverters (VSIs) systems can significantly reduce the control delay and break the bandwidth limitations of traditional synchronous sampling schemes. However, when sampling the capacitor voltage, the high-frequency ripple is introduced int...

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Bibliografiset tiedot
Päätekijät: Jian Yu, Aohui Niu, Zhiyuan Shi, Le Zhou, Renhui Shen
Aineistotyyppi: Artigo
Kieli:Inglês
Julkaistu: IEEE 2024-01-01
Sarja:IEEE Access
Aiheet:
Linkit:https://ieeexplore.ieee.org/document/10439193/
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