APA aipamena

Wang, F., Gong, Z., Hu, X., Yang, X., Yang, H., & Gong, Q. (2016). Nanoscale on-chip all-optical logic parity checker in integrated plasmonic circuits in optical communication range. Sci Rep.

Chicago Style aipamena

Wang, Feifan, Zibo Gong, Xiaoyong Hu, Xiaoyu Yang, Hong Yang, and Qihuang Gong. "Nanoscale On-chip All-optical Logic Parity Checker in Integrated Plasmonic Circuits in Optical Communication Range." Sci Rep 2016.

MLA aipamena

Wang, Feifan, et al. "Nanoscale On-chip All-optical Logic Parity Checker in Integrated Plasmonic Circuits in Optical Communication Range." Sci Rep 2016.

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