Yu, W. J., Li, Z., Zhou, H., Chen, Y., Wang, Y., Huang, Y., & Duan, X. (2012). Vertically stacked multi-heterostructures of layered materials for logic transistors and complementary inverters. Nat Mater.
Styl ChicagoYu, Woo Jong, Zheng Li, Hailong Zhou, Yu Chen, Yang Wang, Yu Huang, a Xiangfeng Duan. "Vertically Stacked Multi-heterostructures of Layered Materials for Logic Transistors and Complementary Inverters." Nat Mater 2012.
Citace podle MLAYu, Woo Jong, et al. "Vertically Stacked Multi-heterostructures of Layered Materials for Logic Transistors and Complementary Inverters." Nat Mater 2012.
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