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SIMULATED ANNEALING ALGORITHM FOR MODERN VLSI FLOORPLANNING PROBLEM
In floorplanning, our aim is to determine the relative locations of the blocks in the chip and the objective is to minimize the floorplan area, wirelength. Generally, there are so many strategies in VLSI floorplanning like area optimization, wirelength optimization, power optimization, temperatu...
שמור ב:
| Main Authors: | , , |
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| פורמט: | Artigo |
| שפה: | Inglês |
| יצא לאור: |
ICT Academy of Tamil Nadu
2016-04-01
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| סדרה: | ICTACT Journal on Microelectronics |
| נושאים: | |
| גישה מקוונת: | http://ictactjournals.in/paper/IJME_V2_I1_paper_1_175_181.pdf |
| תגים: |
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