SIMULATED ANNEALING ALGORITHM FOR MODERN VLSI FLOORPLANNING PROBLEM

In floorplanning, our aim is to determine the relative locations of the blocks in the chip and the objective is to minimize the floorplan area, wirelength. Generally, there are so many strategies in VLSI floorplanning like area optimization, wirelength optimization, power optimization, temperatu...

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Autori principali: J. Jenifer, S. Anand, Y. Levingstan
Natura: Artigo
Lingua:Inglês
Pubblicazione: ICT Academy of Tamil Nadu 2016-04-01
Serie:ICTACT Journal on Microelectronics
Soggetti:
vlsi
floorplanning
optimization
deadspace
meta-heuristic
simulated annealing
Accesso online:http://ictactjournals.in/paper/IJME_V2_I1_paper_1_175_181.pdf
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