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Low power networks-on-chip
Low Power Networks-on-Chip Edited by: (editors) Cristina Silvano Marcello Lajolo Gianluca Palermo In recent years, both Networks-on-Chip, as an architectural solution for high-speed interconnect, and power consumption, as a key design constraint, have continued to gain interest in the design and res...
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| Autores principales: | , , |
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| Formato: | Livro |
| Lenguaje: | Inglês |
| Publicado: |
Springer US,
2011.
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| Materias: | |
| Acceso en línea: | https://minerva.ufrj.br/F/?func=direct&doc_number=000903032&local_base=UFR01 |
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