Materials for information technology devices, interconnects and packaging - Zschech, Ehrenfried (Engineering materials and processes, 2005)
The fast-developing information technology industry is driving a need for new materials in order to facilitate the development of more reliable microelectronic products. Materials for Information Technology is an up-to-date overview of current developments and R&D activities in the field of materials used for information technology with a focus on future applications. Included are: materials for silicon-based semiconductor devices (including high-k gate dielectric materials); materials for nonvolatile memories; materials for on-chip interconnects and interlayer dielectrics (including silicides, barrier materials, low-k and ultra low-k dielectric materials); and materials for assembly and packaging The latest results in materials science and engineering as well as applications in the semiconductor industry are covered including the synthesis of blanket and patterned thin film materials, their properties, constitution, structure and microstructure. Computer modelling and analytical techniques to characterise thin film structures are also included to give a comprehensive survey of materials for the IT industry. The Engineering Materials and Processes series focuses on all forms of materials and the processes used to synthesise and formulate them as they relate to the various engineering disciplines. The series deals with a diverse range of materials: ceramics; metals (ferrous and non-ferrous); semiconductors; composites, polymers, biomimetics etc. Each monograph in the series is written by a specialist and demonstrates how enhancements in materials and the processes associated with them can improve performance in the field of engineering in which they are used. Recent advances in thin-film deposition - Molecular-beam deposition of high-k gate dielectrics for advanced CMOS - LEPECVD — a production technique for SiGe MOSFETs and MODFETs - Thin-film engineering by atomic-layer deposition for ultra-scaled and novel devices - Atomic-layer deposited barrier and seed layers for interconnects - Copper CVD for conformal ultrathin-film deposition - Pushing PVD to the limits — Recent advances - Surface engineering using self-assembled monolayers: model substrates for atomic-layer deposition - Selective airgaps: towards a scalable low-k solution - Silicides — Recent advances and prospects - TEM characterization of strained silicon - Material aspects of non-volatile memories - An introduction to nonvolatile memory technology - Floating-dot memory transistors on SOI substrate - Ion-beam synthesis of nanocrystals for multidot memory structures - Scaling of ferroelectric-based memory concepts - Device concepts with magnetic tunnel junctions - Phase-change memories - Amorphous-to-fcc transition in GeSbTe alloys - Organic nonvolatile memories - Materials for interconnects - Interconnect technology — Today, recent advances and a look into the future - Dielectric and scaling effects on electromigration for Cu interconnects - Texture and stress study of sub-micron copper interconnect lines using x-ray microdiffraction - Stress modeling for copper interconnect structures - Conductivity enhancement in metallization structures of regular grains - Advanced barriers for copper interconnects - Synthesis and characterization of compounds obtained by crosslinking of polymethylhydrosiloxane by aromatic rings - Revealing the porous structure of low-k materials through solvent diffusion - Carbon nanotube via technologies for future LSI interconnects - Nickel nanowires obtained by template synthesis - Materials for assembly/packaging - The importance of polymers in wafer-level packaging...